This presentation, by the RISC-V founder, will highlight how RISC-V and vector compute are gaining momentum with AI and ML and computer vision and how it addresses challenges like managing power consumption, extra data movement, the need for multiple libraries, and issues with generational incompatibility. To solve these obstacles, many of the world’s largest data and device companies are turning to vector processing based on the RISC‑V Vector (RVV) 1.0 ISA.
Krste Asanovic
Krste is SiFive’s Chief Architect and a Co-Founder. He is also a Professor in the EECS Department at the University of California, Berkeley, where he also serves as Director of the ADEPT Lab. Krste leads the RISC‑V ISA project at Berkeley and is Chairman of the RISC‑V Foundation. He is an ACM Fellow and an IEEE Fellow. Krste received his PhD from UC Berkeley, and a BA in Electrical and Information Sciences from the University of Cambridge.
