Disaggregated memory is a promising approach that addresses the limitations of traditional memory architectures by enabling memory to be decoupled from compute nodes and shared across a data center. Cloud platforms have deployed such systems to improve overall system memory utilization, but performance can vary across workloads. High-performance computing (HPC) is crucial in scientific and engineering applications, where HPC machines also face the issue of underutilized memory. As a result, improving system memory utilization while understanding workload performance is essential for HPC operators. Therefore, learning the potential of a disaggregated memory system before deployment is a critical step. This paper proposes a methodology for exploring the design space of a disaggregated memory system. It incorporates key metrics that affect performance on disaggregated memory systems: memory capacity, local and remote memory access ratio, injection bandwidth, and bisection bandwidth, providing an intuitive approach to guide machine configurations based on technology trends and workload characteristics. We apply our methodology to analyze thirteen diverse workloads, including AI training, data analysis, genomics, protein, fusion, atomic nuclei, and traditional HPC bookends. Our methodology demonstrates the ability to comprehend the potential and pitfalls of a disaggregated memory system and provides motivation for machine configurations. Our results show that eleven of our thirteen applications can leverage injection bandwidth disaggregated memory without affecting performance, while one pays a rack bisection bandwidth penalty and two pay the system-wide bisection bandwidth penalty. In addition, we also show that intra-rack memory disaggregation would meet the application's memory requirement and provide enough remote memory bandwidth.

The presentation delves into the evolution, current state, and prospective developments within data-driven machine learning. In an era where data has ascended to the status of a pivotal resource, this presentation emphasizes its indispensable role in shaping the landscape of machine learning and how these changes have significantly influenced systems infrastructure.

Delving into the past, it meticulously examines the historical origins of data-driven modeling, charting its progression from rudimentary concepts to the intricate algorithms that underpin modern machine learning. The presentation illuminates early techniques like perceptrons and decision trees and elucidates their enduring impact on the field.

In the present, this presentation expounds upon the transformative influence of big data and deep learning, illuminating real-world applications while highlighting the associated challenges and opportunities that have engendered profound alterations in systems infrastructure.

As we look towards the future, this presentation provides invaluable insights into emerging trends and technologies such as quantum computing and edge AI, poised to redefine the future of machine learning and further revolutionize systems infrastructure.

By amalgamating theoretical insights, empirical observations, and forward-looking perspectives, this presentation offers a comprehensive overview of the past achievements, current dynamics, and potential future scenarios in the realm of data-driven machine learning, shedding light on how these changes have reshaped systems infrastructure.

As the cost of sequencing drops and the quantity of data produced by sequencing grows, the amount of processing dedicated to genomics is increasing at a rapid pace.  [Genomics is evolving in a number of directions simultaneously.]  Complex pipelines are written in such a manner that they are portable to either clusters or clouds.  Key kernels are also being ported to GPUs in a drop-in replacement for their non-accelerated counterpart.  These techniques are helping to address challenges of scaling up genomics computations and porting validated pipelines to new systems.  However, all of these computations strain the bandwidth and capacity of available resources.  In this talk, Roche´s Tom Sheffler will share an overview of the memory-bound challenges present in genomics and venture some possible solutions.

The computing world is looking to heterogeneous computing to solve many important problems in AI/Machine Learning (ML) and high-performance computing (HPC). The term “heterogenous compute” refers to the use of groups of processors that are based on different types of computer architectures. This occurs in cases where a particular architecture is better suited for a specific task due to energy-efficiency, task optimization, or the number of cores available in the processors.  The inherent parallelism of working with multiple CPUs, GPUs, ASICs, FPGAs, and NPUs is driving customers’ wider use of expanded memory and "memory pools" to support these scalable, heterogeneous computing workloads. This panel will cover the value points for heterogeneous computing including performance, operational efficiency and energy-efficiency.