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Author:

Prasad Saripalli

Distinguished Engineer
Capital One

Prasad Saripalli serves as a Distinguished Engineer at Capital One, a technology driven bank on the Fortune 100 list, redefining Fintech and Banking using data, technology, AI and ML in unprecedented ways. Most recently, Prasad served as the Vice President of AIML and Distinguished Engineer at MindBody Inc - a portfolio company of Vista which manages the world's fourth-largest enterprise software company after Microsoft, Oracle, and SAP. Earlier, he served as VP Data Science at Edifecs, an industry premier healthcare information technology partnership platform and software provider, building Smart Decisions ML & AI Platform with Ml Apps Front. Prior to this, Prasad served as CTO and VP Engineering at Secrata.com, provider of Military grade Security and Privacy solutions developed and deployed over the past 15 years at Topia Technology for the Federal Government and the Enterprise, and as CTO & EVP at ClipCard, a SaaS based Hierarchical Analytics and Visualization platform.

At IBM, Prasad served as the Chief Architect for IBM's SmartCloud Enterprise (http://www.ibm.com/cloud-computing/us/en/). At Runaware, he served as the Vice President of Product Development. As a Principal Group Manager at Microsoft, Prasad co-led the development of virtualization stack on Windows 7 responsible for shipping Virtual PC7 and Windows XP Mode on Windows 7.


Prasad teaches Machine Learning, AI, NLP, Distributed Systems, Cloud Engineering and Robotics at Northeastern University and the University of Washington Continuum College.

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Prasad Saripalli

Distinguished Engineer
Capital One

Prasad Saripalli serves as a Distinguished Engineer at Capital One, a technology driven bank on the Fortune 100 list, redefining Fintech and Banking using data, technology, AI and ML in unprecedented ways. Most recently, Prasad served as the Vice President of AIML and Distinguished Engineer at MindBody Inc - a portfolio company of Vista which manages the world's fourth-largest enterprise software company after Microsoft, Oracle, and SAP. Earlier, he served as VP Data Science at Edifecs, an industry premier healthcare information technology partnership platform and software provider, building Smart Decisions ML & AI Platform with Ml Apps Front. Prior to this, Prasad served as CTO and VP Engineering at Secrata.com, provider of Military grade Security and Privacy solutions developed and deployed over the past 15 years at Topia Technology for the Federal Government and the Enterprise, and as CTO & EVP at ClipCard, a SaaS based Hierarchical Analytics and Visualization platform.

At IBM, Prasad served as the Chief Architect for IBM's SmartCloud Enterprise (http://www.ibm.com/cloud-computing/us/en/). At Runaware, he served as the Vice President of Product Development. As a Principal Group Manager at Microsoft, Prasad co-led the development of virtualization stack on Windows 7 responsible for shipping Virtual PC7 and Windows XP Mode on Windows 7.


Prasad teaches Machine Learning, AI, NLP, Distributed Systems, Cloud Engineering and Robotics at Northeastern University and the University of Washington Continuum College.

AI/ML has become an integral part of today's technology landscape, but what often goes unnoticed is the underlying Machine Learning Infrastructure. 

This 25-minute talk will peel back the curtain on this critical yet overlooked component and elucidate the evolution of Machine Learning Infrastructure considering the new GenAI wave. 

We'll start by highlighting the 'hidden' efforts and technical debt involved in transitioning machine learning models from prototype to production, referencing the rise of Machine learning Infrastructure from frontier tech companies.
Then, we'll introduce the evolving concept of 'Gen AI', the next frontier of AI, emphasizing the increasing role of Foundation Models, landscape value proposition, and focus on the challenges of domain-specific fine tuners. 

After a comparative lens between traditional machine learning and emerging Generative AI technologies, we'll explore the early thoughts on Generative AI infrastructure and how it's setting the stage for the future of AI.

Take the chance to understand the infrastructure that makes AI possible.

Author:

Suqiang Song

Engineering Director, Data Platform & ML Infrastructure
Airbnb

As engineering director, Suqiang leads multiple teams of ML infrastructure engineers, driving machine learning platforms and infrastructure solutions for all product and engineering teams in Airbnb.

As a senior AI leader, he works closely with senior partners in product and engineering to shape Airbnb’s vision in AI and ML, streamline innovations, and ensure Airbnb has a complete set of AI infrastructure that meets long-term needs.

Previously, Suqiang served as Vice President, Data Platforms and Engineering Services at Mastercard, as one of the Data / AI commit board members to identify strategies and directions for Data Enablement, Data and ML platforms across multiple product lines and multiple deployment infrastructures. He has led worldwide engineering teams of data engineers, Machine Learning engineers, and data analysts to build unified data and ML platforms both on-premise and on-cloud for Mastercard

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Suqiang Song

Engineering Director, Data Platform & ML Infrastructure
Airbnb

As engineering director, Suqiang leads multiple teams of ML infrastructure engineers, driving machine learning platforms and infrastructure solutions for all product and engineering teams in Airbnb.

As a senior AI leader, he works closely with senior partners in product and engineering to shape Airbnb’s vision in AI and ML, streamline innovations, and ensure Airbnb has a complete set of AI infrastructure that meets long-term needs.

Previously, Suqiang served as Vice President, Data Platforms and Engineering Services at Mastercard, as one of the Data / AI commit board members to identify strategies and directions for Data Enablement, Data and ML platforms across multiple product lines and multiple deployment infrastructures. He has led worldwide engineering teams of data engineers, Machine Learning engineers, and data analysts to build unified data and ML platforms both on-premise and on-cloud for Mastercard

Enabling a solution for on-device and edge AI processing is about more than providing raw TOPS in an SoC. In the fast-evolving world of AI, solutions must provide both high performance and high utilization while handling many more “irregular” operations and not just matrix multiplies (transformers, LSTM, etc.), do so within a low-power and small-area profile with minimal accesses to memory, and be easy to use by developers for the networks of today and of the future.

 

In this presentation, we will discuss Cadence’s AI IP products enabling ultra-low-energy, battery-powered devices up to high-end applications requiring many hundreds of TOPs, supported by powerful software tools that enable a no-code environment for mapping networks to target executables.

Author:

Sriraman Chari

Fellow & Head of AI Accelerator IP Solution
Cadence Design Systems
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Sriraman Chari

Fellow & Head of AI Accelerator IP Solution
Cadence Design Systems

Every electronic system you know is either going to get smarter or get replaced. AI is allowing us to solve a new set of problems just recently thought of as impossible. The challenge that we have is to make AI work, not just in the data center, but in all the systems we use and interact with daily. These systems vary from a Falcon Heavy Rocket to a smart contact lens. Some have kilowatts of power available, others not even a microwatt. The AI systems we deliver must meet a vast range of requirements and work in all kinds of environments.   

 

Because AI is computationally very complex, using an average off-the-shelf MPU just isn’t going to get the job done. Russell Klein will describe how you can design the next generation of intelligent systems to surpass these challenges.  

 

At the same time, these systems are often placed in situations where they must work all the time, with no disruptions in service. Ankur Gupta will describe how you can use embedded analytics to design AI systems at the edge that operate reliably, safely, and securely.  

Author:

Ankur Gupta

Senior Vice President and General Manager
Siemens EDA

Ankur Gupta is Senior Vice President and General Manager of Digital Design Creation at Siemens EDA. This includes Test, Embedded Analytics, Digital IC design, Power Optimization, and Power Integrity Analysis. Formerly he was head of Product Management and Applications at Ansys, Semiconductor and Head of Applications Engineering for Digital Implementation & Signoff at Cadence Design Systems.

Ankur has 20+ years of experience in EDA, working on some of the industry’s most innovative Test, Digital Design, Implementation and Signoff products. He holds a Master’s Degree in Electrical and Computer Engineering, from Iowa State University.

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Ankur Gupta

Senior Vice President and General Manager
Siemens EDA

Ankur Gupta is Senior Vice President and General Manager of Digital Design Creation at Siemens EDA. This includes Test, Embedded Analytics, Digital IC design, Power Optimization, and Power Integrity Analysis. Formerly he was head of Product Management and Applications at Ansys, Semiconductor and Head of Applications Engineering for Digital Implementation & Signoff at Cadence Design Systems.

Ankur has 20+ years of experience in EDA, working on some of the industry’s most innovative Test, Digital Design, Implementation and Signoff products. He holds a Master’s Degree in Electrical and Computer Engineering, from Iowa State University.

Author:

Russell Klein

Program Director, CSD Division
Siemens

Russell Klein is a Program Director at Siemens EDA’s (formerly Mentor Graphics) High-Level Synthesis Division focused on processor platforms. He is currently working on algorithm acceleration through the offloading of complex algorithms running as software on embedded CPUs into hardware accelerators using High-Level Synthesis. He has been with Mentor for over 25 years, holding a variety of engineering, marketing and management positions, primarily focused on the boundary between hardware and software. He holds six patents in the area of hardware/software verification and optimization. Prior to joining Mentor he worked for Synopsys, Logic Modeling, and Fairchild Semiconductor. 

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Russell Klein

Program Director, CSD Division
Siemens

Russell Klein is a Program Director at Siemens EDA’s (formerly Mentor Graphics) High-Level Synthesis Division focused on processor platforms. He is currently working on algorithm acceleration through the offloading of complex algorithms running as software on embedded CPUs into hardware accelerators using High-Level Synthesis. He has been with Mentor for over 25 years, holding a variety of engineering, marketing and management positions, primarily focused on the boundary between hardware and software. He holds six patents in the area of hardware/software verification and optimization. Prior to joining Mentor he worked for Synopsys, Logic Modeling, and Fairchild Semiconductor. 

Abstract coming soon...

Author:

Alexis Black Bjorlin

VP/GM, DGX Cloud
NVIDIA

Dr. Alexis Black Bjorlin was previously VP, Infrastructure Hardware Engineering at Meta. She also serves on the board of directors at Digital Realty and Celestial AI. Prior to Meta, Dr. Bjorlin was Senior Vice President and General Manager of Broadcom’s Optical Systems Division and previously Corporate Vice President of the Data Center Group and General Manager of the Connectivity Group at Intel. Prior to Intel, she spent eight years as President of Source Photonics, where she also served on the board of directors. She earned a B.S. in Materials Science and Engineering from Massachusetts Institute of Technology and a Ph.D. in Materials Science from the University of California at Santa Barbara.

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Alexis Black Bjorlin

VP/GM, DGX Cloud
NVIDIA

Dr. Alexis Black Bjorlin was previously VP, Infrastructure Hardware Engineering at Meta. She also serves on the board of directors at Digital Realty and Celestial AI. Prior to Meta, Dr. Bjorlin was Senior Vice President and General Manager of Broadcom’s Optical Systems Division and previously Corporate Vice President of the Data Center Group and General Manager of the Connectivity Group at Intel. Prior to Intel, she spent eight years as President of Source Photonics, where she also served on the board of directors. She earned a B.S. in Materials Science and Engineering from Massachusetts Institute of Technology and a Ph.D. in Materials Science from the University of California at Santa Barbara.

Author:

Petr Lapukhov

Network Engineer
NVIDIA

Petr Lapukhov is a Network Engineer at Meta. He has 20+ years in the networking industry, designing and operating large scale networks. He has a depth of experience in developing and operating software for network control and monitoring. His past experience includes CCIE/CCDE training and UNIX system administration.

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Petr Lapukhov

Network Engineer
NVIDIA

Petr Lapukhov is a Network Engineer at Meta. He has 20+ years in the networking industry, designing and operating large scale networks. He has a depth of experience in developing and operating software for network control and monitoring. His past experience includes CCIE/CCDE training and UNIX system administration.

 

Petr Lapukhov

Network Engineer
NVIDIA

Petr Lapukhov is a Network Engineer at Meta. He has 20+ years in the networking industry, designing and operating large scale networks. He has a depth of experience in developing and operating software for network control and monitoring. His past experience includes CCIE/CCDE training and UNIX system administration.

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Petr Lapukhov

Network Engineer
NVIDIA

Petr Lapukhov

Network Engineer
NVIDIA

Petr Lapukhov is a Network Engineer at Meta. He has 20+ years in the networking industry, designing and operating large scale networks. He has a depth of experience in developing and operating software for network control and monitoring. His past experience includes CCIE/CCDE training and UNIX system administration.

Join this moderated roundtable discussion group of 10-20 attendees focusing on AI hardware & systems design.

There will be several moderators per topic area to allow for multiple tables and questions will be prepared in advance. Each group will be multidisciplinary with representation from across the tech stack. Attendees who have registered for the event will be able to sign up for the roundtable discussion groups closer to the event, or via an AI Hardware & Edge AI Summit sales representative.

The subtopics to be discussed will include:

- Tackling power consumption for AI hardware
- Memory bandwidth and capacity challenges and solutions
- AI hardware & systems co-design
- System software engineering challenges for novel AI hardware

Join this moderated roundtable discussion group of 10-20 attendees focusing on selecting ML training platforms for specific use cases. 

There will be several moderators per topic area to allow for multiple tables and questions will be prepared in advance. Each group will be multidisciplinary with representation from across the tech stack. Attendees who have registered for the event will be able to sign up for the roundtable discussion groups closer to the event, or via an AI Hardware & Edge AI Summit sales representative.

The subtopics to be discussed will include:

- GPUs vs ASICS vs commodity hardware (i.e. software-accelerated CPUs)
- Considerations for efficient training of training large language models
- Fitting workloads to training hardware - overcoming issues with memory etc.
- Software considerations for novel AI hardware training platforms

In his forthcoming keynote, Lip Bu Tan delves into the transformative impact of Generative AI on today's rapidly evolving intelligent systems. This critical conversation sheds light on the symbiotic relationship between AI semiconductors and systemic hardware growth drivers, showcasing how they are steering the future of purpose-built intelligent systems.

 

As we navigate this unprecedented era of technological advancement, Mr. Tan will explore how Generative AI platforms are accelerating design productivity and enabling innovative AI chip design tools, and define what’s needed to deliver a full generative AI system stack. The keynote will also touch upon the extension of these advancements, highlighting how computational software initially developed for AI can be adapted and applied to other domains, thereby broadening the impact and utility of intelligent systems.

 

Don't miss this enlightening session that promises to redefine our understanding of AI's role in shaping intelligent systems and expanding the frontiers of what's possible across multiple sectors.

Author:

Lip-Bu Tan

Founder & Chairman
Walden International

Lip-Bu Tan is Founder and Chairman of Walden International (“WI”), and Founding Managing Partner of Celesta Capital and Walden Catalyst Ventures, with over $5 billion under management.  He formerly served as Chief Executive Officer and Executive Chairman of Cadence Design Systems, Inc.  He currently serves on the Board of Schneider Electric SE (SU: FP), Intel Corporation (NASDAQ: INTC), and Credo Semiconductor (NASDAQ: CRDO).

 

Lip-Bu focuses on semiconductor/components, cloud/edge infrastructure, data management and security, and AI/machine learning.

 

Lip-Bu received his B.S. from Nanyang University in Singapore, his M.S. in Nuclear Engineering from the Massachusetts Institute of Technology, and his MBA from the University of San Francisco. He also received his honorary degree for Doctor of Humane Letters from the University of San Francisco.  Lip-Bu currently serves on Carnegie Mellon University (CMU)’s Board of Trustees and the School of Engineering Dean’s Council, Massachusetts Institute of Technology (MIT)’s School of Engineering Dean’s Advisory Council, University of California Berkeley (UCB)’s College of Engineering Advisory Board and their Computing, Data Science, and Society Advisory Board, and University of California San Francisco (UCSF)’s Executive Council. He’s also a member of the Global Advisory Board of METI Japan, The Business Council, and Committee 100. He also served on the board of the Board of Global Semiconductor Alliance (GSA) from 2009 to 2021, and as a Trustee of Nanyang Technological University (NTU) in Singapore from 2006 to 2011.  Lip-Bu has been named one of the Top 10 Venture Capitalists in China by Zero2ipo and was listed as one of the Top 50 Venture Capitalists on the Forbes Midas List. He’s the recipient of imec’s 2023 Lifetime of Innovation Award, the Semiconductor Industry Association (SIA) 2022 Robert N. Noyce Award, and GSA’s 2016 Dr. Morris Chang's Exemplary Leadership Award.  In 2017, he was ranked #1 of the most well-connected executives in the technology industry by the analytics firm Relationship Science. 

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Lip-Bu Tan

Founder & Chairman
Walden International

Lip-Bu Tan is Founder and Chairman of Walden International (“WI”), and Founding Managing Partner of Celesta Capital and Walden Catalyst Ventures, with over $5 billion under management.  He formerly served as Chief Executive Officer and Executive Chairman of Cadence Design Systems, Inc.  He currently serves on the Board of Schneider Electric SE (SU: FP), Intel Corporation (NASDAQ: INTC), and Credo Semiconductor (NASDAQ: CRDO).

 

Lip-Bu focuses on semiconductor/components, cloud/edge infrastructure, data management and security, and AI/machine learning.

 

Lip-Bu received his B.S. from Nanyang University in Singapore, his M.S. in Nuclear Engineering from the Massachusetts Institute of Technology, and his MBA from the University of San Francisco. He also received his honorary degree for Doctor of Humane Letters from the University of San Francisco.  Lip-Bu currently serves on Carnegie Mellon University (CMU)’s Board of Trustees and the School of Engineering Dean’s Council, Massachusetts Institute of Technology (MIT)’s School of Engineering Dean’s Advisory Council, University of California Berkeley (UCB)’s College of Engineering Advisory Board and their Computing, Data Science, and Society Advisory Board, and University of California San Francisco (UCSF)’s Executive Council. He’s also a member of the Global Advisory Board of METI Japan, The Business Council, and Committee 100. He also served on the board of the Board of Global Semiconductor Alliance (GSA) from 2009 to 2021, and as a Trustee of Nanyang Technological University (NTU) in Singapore from 2006 to 2011.  Lip-Bu has been named one of the Top 10 Venture Capitalists in China by Zero2ipo and was listed as one of the Top 50 Venture Capitalists on the Forbes Midas List. He’s the recipient of imec’s 2023 Lifetime of Innovation Award, the Semiconductor Industry Association (SIA) 2022 Robert N. Noyce Award, and GSA’s 2016 Dr. Morris Chang's Exemplary Leadership Award.  In 2017, he was ranked #1 of the most well-connected executives in the technology industry by the analytics firm Relationship Science. 

 

Ginny Siller

Director Government Affairs
Animal Health Institute

Ginny Siller

Director Government Affairs
Animal Health Institute

Ginny Siller

Director Government Affairs
Animal Health Institute